Transmission of signals between semiconductor chips is important for achieving system performance objectives. In wired communications, signals are transmitted by off-chip drivers (OCD) or circuits to a card, board, or substrate. In typical semiconductor designs, the signals are transmitted through signal pads, wire bonds (or solder balls), and metal interconnects to the card, board, or substrate. The signals are then received by a receiver network through the metal interconnects, wire bonds, and signal pads. In system designs, the time of flight, the capacitance loading, and the resistance can impact the system performance. As technology performance increases, the capacitance loading effect of these interconnects becomes performance impacting.
On all external pins (e.g. signal transmission pins, receiver pins, power pins), electrostatic discharge (ESD) networks are placed, in order to protect sensitive circuits. ESD is a phenomenon known to degrade or destroy discrete electronic components. In particular, given the decreasing size of circuit features with ever improving process technology, static electricity can destroy or substantially harm many of today's integrated circuits. Tribo-electric charges are produced anytime two surfaces are separated and if one or more of the surfaces is a nonconductor, then static electric charge is produced. This is a natural phenomenon and only causes a problem if the static charge is allowed to discharge or induce a charge into the integrated circuit. Such an ESD event can occur very persuasively to a point of several thousand volts. The discharge occurs very rapidly and the usual failure or degradation is caused by the gasification of metal within the device or the semiconductor material.
The damage following each electrostatic discharge event may be instantly catastrophic. Often times, however, the integrated circuit does not totally fail, but rather, remains operable within a latent defect that will ultimately result in premature failure. Such events can also alter the operating characteristics of the integrated circuit, thereby resulting in unsatisfactory and often unpredictable operation. Electrostatic discharge between input/output connects of a semiconductor device chip can occur, for example, from human handling, automated circuit testing or during packaging of discrete integrated circuit chips. To reduce the risk of handling, ESD protection circuits are placed on semiconductor chips' signal pins.
However, the conventional wired signal transmission systems do not allow direct chip-to-chip wireless signal transmissions. Instead, inter-chip signals must be transmitted electrically through the surface or edge wirings, which have relatively high capacitance loading, require expensive semiconductor processing, and are not suitable for high speed, high bandwidth, or high frequency applications.
Further, the ESD structures used in the conventional wired signal transmission systems typically contain ESD protection circuits or components that have significantly large footprints. Further, the ESD protection circuits on off-chip drivers (OCD) and receiver networks lead to additional capacitance loading, which adversely impacts the system performance. Therefore, the ESD structures in the conventional wired signal transmission systems impose a challenge for further scaling and hinders further improvement of system performance.
There is a continuing need for improved semiconductor structures that allow direct chip-to-chip wireless signal transmissions without surface or edge wirings and are suitable for use in high speed, high bandwidth, and/or high frequency applications.